[1]张小鸣,张俊玲.基于QuartusⅡ 9.0的MAX192控制器设计[J].常州大学学报(自然科学版),2014,(02):26-31.[doi:10.3969/j.issn.2095-0411.2014.02.008]
　ZHANG Xiao-ming,ZHANG Jun-ling.Design of the MAX192 Controller Based on QuartusⅡ 9.0[J].Journal of Changzhou University(Natural Science Edition),2014,(02):26-31.[doi:10.3969/j.issn.2095-0411.2014.02.008]
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基于QuartusⅡ 9.0的MAX192控制器设计()
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常州大学学报(自然科学版)[ISSN:2095-0411/CN:32-1822/N]

卷:
期数:
2014年02期
页码:
26-31
栏目:
出版日期:
2014-04-30

文章信息/Info

Title:
Design of the MAX192 Controller Based on QuartusⅡ 9.0
作者:
张小鸣; 张俊玲
常州大学 信息科学与工程学院,江苏 常州 213164
Author(s):
ZHANG Xiao-ming;  ZHANG Jun-ling
School of Information Science and Engineering,Changzhou University,Changzhou 213164,China
关键词:
A/D转换器; A/D控制器; 多通道顺序控制器; 结果寄存器
Keywords:
A/D converter;  A/D controller;  multichannel sequential controller;  result register
分类号:
TP391.9
DOI:
10.3969/j.issn.2095-0411.2014.02.008
文献标志码:
A
摘要:
为了减轻微处理器频繁控制A/D转换器转换时序与读取A/D转换结果的负担,提出了串行A/D转换器MAX192的设计方法。根据MAX192多通道顺序转换时序的特点,设计出基于QuartusⅡ9.0的8通道顺序转换控制器和8通道A/D转换结果寄存器阵列。每个通道配置64个结果寄存器,可满足64点周期采样的需要。采用VHDL语言和原理图相结合的方法实现MAX192控制器,并通过了时序仿真验证。仿真结果表明:基于QuartusⅡ9.0的MAX192控制器对8个通道信号顺序转换时,每个通道的转换时间与单通道单独转换相比减少了37.5%;结果寄存器可及时存储每次转换结果,便于微处理器及时读取A/D转换结果进行后续快速数字信号处理运算,提高了数据采集系统的实时性,具有工程应用价值。
Abstract:
In order to reduce the burden of frequently controlling A/D converter's conversion timing and reading A/D conversion results frequently by microprocessor, the MAX192 controller design method based on QuartusⅡ 9.0 is proposed. According to the characteristics of MAX192 multichannel conversion timing, 8channel order converter controller and 8channel A/D conversion results registers' array is designed. 64 results registers are configured for each channel to meet the need of 64 points periodic sampling.MAX192 controller is realized by using VHDL language and schematic, and the timing simulation is passed. The simulation result shows that the average conversion time of each channel is decreased by 37.5% compared with that of single channel conversion when the multichannel sequential conversions are controlled by MAX192 controller based on QuartusⅡ 9.0 sample. Results registers are used to store the conversed results in time, to facilitate microprocessor to timely read the A/D conversion results for subsequent fast digital signal processing operations. The timeliness of data acquisition system is improved.It has application value in engineering.

参考文献/References:

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备注/Memo

备注/Memo:
作者简介:张小鸣(1958-),男,安徽合肥人,博士,教授,主要从事嵌入式系统方面的研究。
更新日期/Last Update: 2014-04-20